diff options
| author | Michael Smith <mikesmiffy128@gmail.com> | 2024-09-08 13:35:46 +0100 |
|---|---|---|
| committer | Michael Smith <mikesmiffy128@gmail.com> | 2024-09-08 13:35:46 +0100 |
| commit | 7051e068d3250c44a47b7ea14d911c104696b6fa (patch) | |
| tree | 221d885ddac442700af4e060da5c3b6b33fa7342 | |
| parent | 80e90888162628949ac6826ef15bf075b2237b0d (diff) | |
This fixes the mistake with the version string in the process.
| -rw-r--r-- | src/version.h | 4 | ||||
| -rw-r--r-- | src/x86.c | 5 | ||||
| -rw-r--r-- | src/x86.h | 23 |
3 files changed, 19 insertions, 13 deletions
diff --git a/src/version.h b/src/version.h index f66e9a4..d37adec 100644 --- a/src/version.h +++ b/src/version.h @@ -1,3 +1,3 @@ -#define VERSION "1.0" +#define VERSION "1.2" #define VERSION_MAJOR 1 -#define VERSION_MINOR 1 +#define VERSION_MINOR 2 @@ -1,5 +1,5 @@ /* - * Copyright © 2023 Michael Smith <mikesmiffy128@gmail.com> + * Copyright © 2024 Michael Smith <mikesmiffy128@gmail.com> * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above @@ -40,7 +40,7 @@ static int mrmsib(const uchar *p, int addrlen) { case 0x80: return 1 + addrlen + sib; } } - if (addrlen == 2 && *p == 0x26) return 3; + if (addrlen == 2 && (*p & 0xC7) == 0x06) return 3; return 1; // note: include the mrm itself in the byte count } @@ -65,6 +65,7 @@ P: X86_SEG_PREFIXES(CASES) X86_OPS_1BYTE_NO(CASES) return pfxlen + 1; X86_OPS_1BYTE_I8(CASES) operandlen = 1; X86_OPS_1BYTE_IW(CASES) return pfxlen + 1 + operandlen; + X86_OPS_1BYTE_IWI(CASES) return pfxlen + 1 + addrlen; X86_OPS_1BYTE_I16(CASES) return pfxlen + 3; X86_OPS_1BYTE_MRM(CASES) return pfxlen + 1 + mrmsib(insn + 1, addrlen); X86_OPS_1BYTE_MRM_I8(CASES) operandlen = 1; @@ -1,5 +1,5 @@ /* - * Copyright © 2023 Michael Smith <mikesmiffy128@gmail.com> + * Copyright © 2024 Michael Smith <mikesmiffy128@gmail.com> * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above @@ -25,6 +25,9 @@ */ // XXX: no BOUND (0x62): ambiguous with EVEX prefix - can't be arsed! +// XXX: no LES (0xC4) or DES (0xC5) either for similar reasons. better to report +// an unknown instruction than to potentially misinterpret an AVX thing. +// these are all legacy instructions that won't really be used much anyway. /* Instruction prefixes: segments */ #define X86_SEG_PREFIXES(X) \ @@ -124,7 +127,6 @@ X(X86_INT3, 0xCC) \ X(X86_INTO, 0xCE) \ X(X86_XLAT, 0xD7) \ - X(X86_JMPI8, 0xEB) \ X(X86_CMC, 0xF5) \ X(X86_CLC, 0xF8) \ X(X86_STC, 0xF9) \ @@ -144,8 +146,6 @@ X(X86_XORALI, 0x34) \ X(X86_CMPALI, 0x3C) \ X(X86_PUSHI8, 0x6A) \ - X(X86_MOVALII, 0xA0) /* From offset (indirect) */ \ - X(X86_MOVIIAL, 0xA2) /* To offset (indirect) */ \ X(X86_TESTALI, 0xA8) \ X(X86_JO, 0x70) \ X(X86_JNO, 0x71) \ @@ -177,7 +177,8 @@ X(X86_LOOPNZ, 0xE0) /* AKA LOOPNE */ \ X(X86_LOOPZ, 0xE1) /* AKA LOOPE */ \ X(X86_LOOP, 0xE2) \ - X(X86_JCXZ, 0xE3) + X(X86_JCXZ, 0xE3) \ + X(X86_JMPI8, 0xEB) /* Single-byte opcodes with a word-sized immediate operand */ #define X86_OPS_1BYTE_IW(X) \ @@ -190,8 +191,6 @@ X(X86_XOREAXI, 0x35) \ X(X86_CMPEAXI, 0x3D) \ X(X86_PUSHIW, 0x68) \ - X(X86_MOVEAXII, 0xA1) /* From offset (indirect) */ \ - X(X86_MOVIIEAX, 0xA3) /* To offset (indirect) */ \ X(X86_TESTEAXI, 0xA9) \ X(X86_MOVEAXI, 0xB8) \ X(X86_MOVECXI, 0xB9) \ @@ -204,6 +203,13 @@ X(X86_CALL, 0xE8) \ X(X86_JMPIW, 0xE9) +/* Single-byte opcodes with a word-sized immediate operand (indirect) */ +#define X86_OPS_1BYTE_IWI(X) \ + X(X86_MOVALII, 0xA0) /* From offset (indirect) */ \ + X(X86_MOVEAXII, 0xA1) /* From offset (indirect) */ \ + X(X86_MOVIIAL, 0xA2) /* To offset (indirect) */ \ + X(X86_MOVIIEAX, 0xA3) /* To offset (indirect) */ \ + /* Single-byte opcodes with 16-bit immediate operands, regardless of prefixes */ #define X86_OPS_1BYTE_I16(X) \ X(X86_RETI16, 0xC2) \ @@ -259,8 +265,6 @@ X(X86_LEA, 0x8D) \ X(X86_MOVSM, 0x8E) /* Store 4 bytes to segment register */ \ X(X86_POPM, 0x8F) \ - X(X86_LES, 0xC4) \ - X(X86_LDS, 0xC5) \ X(X86_SHIFTM18, 0xD0) /* Shift/roll by 1 place */ \ X(X86_SHIFTM1W, 0xD1) /* Shift/roll by 1 place */ \ X(X86_SHIFTMCL8, 0xD2) /* Shift/roll by CL places */ \ @@ -297,6 +301,7 @@ X86_OPS_1BYTE_NO(X) \ X86_OPS_1BYTE_I8(X) \ X86_OPS_1BYTE_IW(X) \ + X86_OPS_1BYTE_IWI(X) \ X86_OPS_1BYTE_I16(X) \ X86_OPS_1BYTE_MRM(X) \ X86_OPS_1BYTE_MRM_I8(X) \ |